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SolidVer |
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When Experience Counts |
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Services |
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· Verification
solutions |
Consulting for the right verification solution
based on schedule complexity, budget and resources. |
Time to market, verification solutions, for complex ASICs projects. |
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Suggest a number of creative verification
solutions for the same ASIC design. |
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· Verification
tools |
Selecting the right verification tools and
methodologies. |
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· Design
Verification
Architecture and
Methodology |
· Design
robust structured verification architecture. · Flexible
for design changes. · Enable
fast integration for full chip and system levels. · Design
generic verification environments, for reuse. |
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· Review
existing ASIC
designs architecture |
Some of our customers developed their ASICs on
a very short schedule with many design changes and the
reviews we did were found to be very useful. |
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· Test
plans |
Prepare test plans specification. |
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· Verification
environments |
Code the verification environments, including
the reference model, generators, drivers, monitors, bus functional model (BFM),
checkers and coverage. |
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· Reviewing
existing projects |
Reviewing existing verification environments,
generation and coverage, in order to find uncovered features. |
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· ASIC
Model Checking |
Coding ASIC models, including coding the input
generators and behavioral models. |
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· Functional
Coverage |
Define and implement functional coverage for
existing projects. |
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· Fast ramp
Up |
Based on our experience, it's possible to plan
the verification tasks in a way that will enable start finding real ASICs
bugs in a very short schedule. |
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© SolidVer,. All rights reserved. |
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